LP3876ES-3.3SLASHNOPB datasheet(3/24 Pages) TI

3 / 24 page

LP3873, LP3876

www.ti.com

SNVS220E – NOVEMBER 2002 – REVISED APRIL 2013

Block Diagram LP3876

These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam

during storage or handling to prevent electrostatic damage to the MOS gates.

Absolute Maximum Ratings

(1) (2)

Storage Temperature Range

−65°C to +150°C

Lead Temperature

Soldering, 5 sec.

260°C

ESD Rating(3)

2 kV

Power Dissipation(4)

Internally Limited

Input Supply Voltage (Survival)

−0.3V to +7.5V

Shutdown Input Voltage (Survival)

−0.3V to 7.5V

Output Voltage (Survival)(5)(6)

−0.3V to +6.0V

IOUT (Survival)

Short Circuit Protected

Maximum Voltage for ERROR Pin

VIN

Maximum Voltage for SENSE Pin

VOUT

(1)

Absolute maximum ratings indicate limits beyond which damage to the device may occur. Operating ratings indicate conditions for which

the device is intended to be functional, but does not ensure specific performance limits. For ensured specifications and test conditions,

see Electrical Characteristics. The ensured specifications apply only for the test conditions listed. Some performance characteristics may

degrade when the device is not operated under the listed test conditions.

(2)

If Military/Aerospace specified devices are required, please contact the Texas Instruments Sales Office/ Distributors for availability and

specifications.

(3)

The human body model is a 100pF capacitor discharged through a 1.5k

Ω resistor into each pin.

(4)

At elevated temperatures, devices must be derated based on package thermal resistance. The devices in TO-220 package must be

derated at

θjA = 50°C/W (with 0.5in

2, 1oz. copper area), junction-to-ambient (with no heat sink). The devices in the TO263 surface-

mount package must be derated at

θjA = 60°C/W (with 0.5in

2, 1oz. copper area), junction-to-ambient. See Application Hints.

(5)

If used in a dual-supply system where the regulator load is returned to a negative supply, the output must be diode-clamped to ground.

(6)

The output PMOS structure contains a diode between the VIN and VOUT terminals. This diode is normally reverse biased. This diode will

get forward biased if the voltage at the output terminal is forced to be higher than the voltage at the input terminal. This diode can

typically withstand 200mA of DC current and 1Amp of peak current.

Operating Ratings

Input Supply Voltage(1)

2.5V to 7.0V

Shutdown Input Voltage

−0.3V to 7.0V

Maximum Operating Current (DC)

Junction Temperature

−40°C to +125°C

(1)

The minimum operating value for VIN is equal to either [VOUT(NOM) + VDROPOUT] or 2.5V, whichever is greater.

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