PIC18F020-ISLASHP datasheet(72/176 Pages) MICROCHIP

72 / 176 page

PIC18F010/020

DS41142A-page 70

Preliminary

 2001 Microchip Technology Inc.

WPUB: WEAK PULL-UP REGISTER (ADDRESS 0XF79h)

IOCB: INTERRUPT-ON-CHANGE PORTB REGISTER (ADDRESS 0XF78h)

U-0

R/P-1

—

WPUB5

WPUB4

WPUB3

WPUB2

WPUB1

WPUB0

bit 7

bit 0

bit 7-6

Unimplemented: Read as ‘0’

bit 5-0

WPUB<5:0>: Weak Pull-up Register bit

= Pull-up disabled

= Pull-up enabled

Note 1: Global RBPU must be enabled for individual pull-ups to be enabled.

2: The weak pull-up device is automatically disabled if the pin is in output mode

(TRIS = 0).

Legend:

R = Readable bit

W = Writable bit

U = Unimplemented bit, read as ‘0’

- n = Value at POR

’1’ = Bit is set

’0’ = Bit is cleared

x = Bit is unknown

U-0

R/W-0

—

IOCB5

IOCB4

IOCB3

IOCB2

IOCB1

IOCB0

bit 7

bit 0

bit 7-6

Unimplemented: Read as ‘0’

bit 5-0

IOCB<5:0>: Interrupt-on-Change PORTB Control bit

= Interrupt-on-change enabled

= Interrupt-on-change disabled

Note 1: Global interrupt enables (GIE and RBIE) must be enabled for individual interrupts to

be recognized.

Legend:

R = Readable bit

W = Writable bit

U = Unimplemented bit, read as ‘0’

- n = Value at POR

’1’ = Bit is set

’0’ = Bit is cleared

x = Bit is unknown

PIC18F020-I/P bảng dữ liệu(PDF) 72 Page - Microchip Technology

PIC18F020-I/P bảng dữ liệu(HTML) 72 Page - Microchip Technology

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

bảng dữ liệu tải về

Link URL