93C46B

© 1997 Microchip Technology Inc.

Preliminary

DS21172D-page 7

3.8

WRITE

The WRITE instruction is followed by 16 bits of data,

which are written into the specified address. After the

last data bit is clocked into the DI pin, the self-timed

auto-erase and programming cycle begins.

The DO pin indicates the READY/BUSY status of the

device, if CS is brought high after a minimum of 250 ns

DO at logical “0” indicates that programming is still in

progress. DO at logical “1” indicates that the register at

the specified address has been written with the data

specified and the device is ready for another instruc-

tion.

3.9

Write All (WRAL)

The Write All (WRAL) instruction will write the entire

memory array with the data specified in the command.

The WRAL cycle is completely self-timed and com-

mences at the rising clock edge of the last data bit.

Clocking of the CLK pin is not necessary after the

device has entered the WRAL cycle. The WRAL com-

mand does include an automatic ERAL cycle for the

device. Therefore, the WRAL instruction does not

require an ERAL instruction, but the chip must be in the

EWEN status.

The DO pin indicates the READY/BUSY status of the

device if CS is brought high after a minimum of 250 ns

FIGURE 3-7:

WRITE TIMING

FIGURE 3-8:

WRAL TIMING

CS

CLK

DI

DO

1

0

1

An

•••

A0

Dx

•••

D0

BUSY

READY

HIGH-Z

HIGH-Z

Twc

CS

CLK

DI

DO

HIGH-Z

1

0

0

0

1

X

•••

X

Dx

•••

D0

HIGH-Z

BUSY

READY