24LC21

DS21095F-page 10

© 1996 Microchip Technology Inc.

FIGURE 7-3:

SEQUENTIAL READ

P

BUS ACTIVITY

MASTER

SDA LINE

BUS ACTIVITY

S

T

O

P

CONTROL

BYTE

A

C

K

N

O

A

C

K

DATA n

DATA n + 1

DATA n + 2

DATA n + X

A

C

K

A

C

K

A

C

K

8.0

PIN DESCRIPTIONS

8.1

SDA

This pin is used to transfer addresses and data into and

out of the device, when the device is in the Bi-Direc-

tional Mode. In the Transmit-Only Mode, which only

allows data to be read from the device, data is also

transferred on the SDA pin. This pin is an open drain

terminal, therefore the SDA bus requires a pullup resis-

Ω for 100 kHz, 1KΩ for 400 kHz).

For normal data transfer in the Bi-Directional Mode,

SDA is allowed to change only during SCL low.

Changes during SCL high are reserved for indicating

the START and STOP conditions.

8.2

SCL

This pin is the clock input for the Bi-Directional Mode,

and is used to synchronize data transfer to and from the

device. It is also used as the signaling input to switch

the device from the Transmit Only Mode to the Bi-Direc-

tional Mode. It must remain high for the chip to continue

operation in the Transmit Only Mode.

8.3

VCLK

This pin is the clock input for the Transmit Only Mode.

In the Transmit Only Mode, each bit is clocked out on

the rising edge of this signal. In the Bi-Directional

Mode, a high logic level is required on this pin to enable

write capability.