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LM4810 bảng dữ liệu(PDF) 4 Page - Texas Instruments |
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LM4810 bảng dữ liệu(HTML) 4 Page - Texas Instruments |
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4 / 25 page ![]() LM4810 SNAS125D – FEBRUARY 2001 – REVISED APRIL 2013 www.ti.com These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. Absolute Maximum Ratings (1) (2) Supply Voltage 6.0V Storage Temperature −65°C to +150°C ESD Susceptibility (3) 3.5kV ESD Machine Model (4) 250V Junction Temperature (TJ) 150°C Vapor Phase (60 sec.) 215°C Soldering Information SOIC Package Infrared (15 sec.) 220°C θJA (SOIC) 170°C/W θJC (SOIC) 35°C/W θJA (VSSOP) 210°C/W Thermal Resistance θJC (VSSOP) 56°C/W θJA (WSON) 117°C/W (5) θJA (WSON) 150°C/W (6) θJC (WSON) 15°C/W (1) Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. (2) Military/Aerospace specified devices are required, please contact the Texas Instruments Sales Office/ Distributors for availability and specifications. (3) Human body model, 100pF discharged through a 1.5k Ω resistor. (4) Machine Model ESD test is covered by specification EIAJ IC-121-1981. A 200pF cap is charged to the specified voltage, then discharged directly into the IC with no external series resistor (resistance of discharge path must be under 50Ohms). (5) The given θJA is for an LM4810 packaged in an NGL0008B with the Exposed-Dap soldered to a printed circuit board copper pad with an area equivalent to that of the Exposed-Dap itself. (6) The given θJA is for an LM4810 packaged in an NGL0008B with the Exposed-Dap not soldered to any circuit board copper. Operating Ratings (1) Temperature Range TMIN ≤ TA ≤ TMAX −40°C ≤ T A ≤ 85°C Supply Voltage (VCC 2.0V ≤ V CC ≤ 5.5V (1) Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Electrical Characteristics (1) (2) The following specifications apply for VDD = 5V unless otherwise specified, limits apply to TA = 25°C. LM4810 Units Parameter Test Conditions (Limits) Typ (3) Limit (4) VDD Supply Voltage 2.0 V (min) 5.5 V (max) IDD Supply Current VIN = 0V, IO = 0A 1.3 3 mA(max) ISD Shutdown Current VIN = 0V, VSHUTDOWN = VDD 0.4 2 µA(max) VOS Output Offset Voltage VIN = 0V 4.0 50 mV(max) PO Output Power THD+N = 0.1%, f = 1kHz RL = 16Ω 105 mW RL = 32Ω 70 65 mW(min) THD+N Total Harmonic Distortion PO = 50mW, RL = 32Ω 0.3 % f = 20Hz to 20kHz Crosstalk Channel Separation RL = 32Ω; PO = 70mW 70 dB (1) Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. (2) All voltages are measured with respect to the ground pin, unless otherwise specified. (3) Typical specifications are specified at +25OC and represent the most likely parametric norm. (4) Datasheet max/min specification limits are ensured by design, test, or statistical analysis. 4 Submit Documentation Feedback Copyright © 2001–2013, Texas Instruments Incorporated Product Folder Links: LM4810 |
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