7-50

October 1998

MIC58P42

Micrel

Absolute Maximum Ratings (Note 1, 2)

at 25

Output Voltage

80V

50V

4.5V to 15V

25V

–20V

MIC58P42BN

1.82W

Derate above T

A

= +25

°C

18mW/

°C

MIC58P42BV

1.4W

Derate above T

A

= +25

°C

14mW/

°C

MIC58P42BWM

1.2W

Derate above T

A

= +25

°C

12mW/

°C

–55

°C to +125°C

–65

°C to +150°C

Note 1: For Inductive load applications.

Note 2: CMOS devices have input-static protection but are susceptible to

damage when exposed to extremely high static electrical

charges.

STROBE

OUTPUT

ENABLE

DD

V

SS

V

CLOCK

SERIAL

DATA IN

DD

V

SS

V

Typical Input Circuits

PLCC Pin Configuration

1

2

3

4

12

13

11

20

19

18

14

15

16

17

9

10

5

6

7

8

OUT 3

OUT 4

OUT 5

OUT 6

OUT 7

SERIAL DATA OUT

VSS

NC

VDD

NC

MIC58P42BV

SUB

N

OUT

K

EE

V

3K

Typical Output Driver

Pin

Name

Description

(DIP & S.O.)

1,9

V

EE

Substrate. Most Negative voltage in the system connects here.

2

CLOCK

Serial Data Clock. A CLEAR input must also be clocked into the latches.

3

SERIAL DATA IN

Serial Data Input pin.

4V

SS

Logic reference (Ground) pin.

5V

DD

Logic Positive Supply voltage.

6

SERIAL DATA OUT

Serial Data Output pin. (Flow–through).

7

STROBE

Output Strobe pin. Loads output latches when high. Strobe is needed to clear latch.

8

OUTPUT

When Low, Outputs are active. When High, device is reset from a fault condition.

ENABLE/RESET

10

K

Transient suppression diode's cathode common pin.

11—18

OUTPUT N

Open Collector outputs 8 through 1.

Pin Description