5

P/N:PM0641

REV. 0.3, NOV. 06, 2001

MX29L3211

Table2.2 Bus Operations for BYTE-Wide Mode (BYTE = VIL)

Mode

Notes

CE

OE

WE

A0

A1

A9

Q0-Q7

Q8-Q14

Q15/A-1

Read

1

VIL

VIL

VIH

X

X

X

DOUT

HighZ

VIL/VIH

Output Disable

1

VIL

VIH

VIH

X

X

X

High Z

High Z

X

Standby

1

VIH

X

X

X

X

X

High Z

HIgh Z

X

Manufacturer ID

2,4

VIL

VIL

VIH

VIL

VIL

VID

C2H

High Z

VIL

Device ID

2,4

VIL

VIL

VIH

VIH

VIL

VID

F9H

High Z

VIL

Write

1,3

VIL

VIH

VIL

X

X

X

DIN

High Z

VIL/VIH

Table 2.1 Bus Operations for Word-Wide Mode (BYTE = VIH)

Mode

Notes

CE

OE

WE

A0

A1

A9

Q0-Q7

Q8-Q14

Q15/A-1

Read

1

VIL

VIL

VIH

X

X

X

DOUT

DOUT

DOUT

Output Disable

1

VIL

VIH

VIH

X

X

X

High Z

High Z

HighZ

Standby

1

VIH

X

X

X

X

X

High Z

HIgh Z

HighZ

Manufacturer ID

2,4

VIL

VIL

VIH

VIL

VIL

VID

C2H

00H

0B

Device ID

2,4

VIL

VIL

VIH

VIH

VIL

VID

F9H

00H

0B

Write

1,3

VIL

VIH

VIL

X

X

X

DIN

DIN

DIN

BUS OPERATION

Flash memory reads, erases and writes in-system via the local CPU . All bus cycles to or from the flash memory

conform to standard microprocessor bus cycles.

NOTES :

1. X can be VIH or VIL for address or control pins.

2. A0 and A1 at VIL provide manufacturer ID codes. A0 at VIH and A1 at VIL provide device ID codes. A0 at VIL, A1 at VIH and

with appropriate sector addresses provide Sector Protect Code.(Refer to Table 4)

3. Commands for different Erase operations, Data program operations or Sector Protect operations can only be successfully

completed through proper command sequence.

4. VID = 11.5V- 12.5V.