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LM8850URE/NOPB bảng dữ liệu(PDF) 2 Page - Texas Instruments

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LM8850URE/NOPB bảng dữ liệu(HTML) 2 Page - Texas Instruments

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LM8850
SNVS647C – AUGUST 2010 – REVISED MAY 2013
www.ti.com
DESCRIPTION (CONTINUED)
High-switching frequency enables smaller passive components. Internal compensation is used for a broader
range of inductor and output capacitor values to meet system demand and achieve small system solution size.
LM8850 is available in a 9-bump ultra-thin DSBGA package. Only four external surface-mount components, a 1.0
µH inductor, a 4.7 µF for input capacitor, 4.7 µF for output capacitor and 0.05F-1.0F supercapacitor for energy
storage are required.
Connection Diagram
Figure 1. 9-Bump Ultra-Thin DSBGA Package
See Package Number YPD0009
PIN DESCRIPTIONS
Pin #
Name
Description
A1
VIN
Power Supply Input. Connect to input filter capacitor (See Typical Application
Circuit)
A2
SW
Switching node. Connection to the internal NFET switch and PFET synchronous
rectifier
A3
GND
Ground Pin
B1
SDA
I2C data (Use a 2k
Ω pull-up resistor)
B2
PG
Power Good indicator
B3
VOUT
Output pin.
C1
SCLK
I2C Clock (Use a 2k
Ω pull-up resistor)
C2
EN
Enable pin. The device is in shutdown when voltage to this pin is <0.4V and enabled
when >1.2V. Do not leave this pin floating.
C3
BAL
Balancing pin for active voltage balancing of supercapacitor
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
2
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Copyright © 2010–2013, Texas Instruments Incorporated
Product Folder Links: LM8850



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