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CSD87381P bảng dữ liệu(PDF) 10 Page - Texas Instruments

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Giải thích chi tiết về linh kiện  CSD87381P Synchronous Buck NexFET??Power Block II
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CSD87381P bảng dữ liệu(HTML) 10 Page - Texas Instruments

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CSD87381P
SLPS405F – MARCH 2013 – REVISED MARCH 2015
www.ti.com
6 Application and Implementation
NOTE
Information in the following applications sections is not part of the TI component
specification, and TI does not warrant its accuracy or completeness. TI ’ s customers are
responsible for determining suitability of components for their purposes. Customers should
validate and test their design implementation to confirm system functionality.
6.1 Application Information
The CSD87381P NexFET power block is an optimized design for synchronous buck applications using 5 V gate
drive. The control FET and sync FET silicon are parametrically tuned to yield the lowest power loss and highest
system efficiency. As a result, a new rating method is needed, which is tailored towards a more systems-centric
environment. System-level performance curves such as Power Loss, Safe Operating Area, and normalized
graphs allow engineers to predict the product performance in the actual application.
6.1.1 Power Loss Curves
MOSFET-centric parameters such as RDS(ON) and Qgd are needed to estimate the loss generated by the devices.
In an effort to simplify the design process for engineers, TI has provided measured power loss performance
curves. Figure 1 plots the power loss of the CSD87381P as a function of load current. This curve is measured by
configuring and running the CSD87381P as it would be in the final application (see Figure 27). The measured
power loss is the CSD87381P loss and consists of both input conversion loss and gate drive loss. Equation 1 is
used to generate the power loss curve.
(VIN × IIN) + (VDD × IDD) – (VSW_AVG × IOUT) = Power Loss
(1)
The power loss curve in Figure 1 is measured at the maximum recommended junction temperatures of 125°C
under isothermal test conditions.
6.1.2 Safe Operating Curves (SOA)
The SOA curves in the CSD87381P data sheet provides guidance on the temperature boundaries within an
operating system by incorporating the thermal resistance and system power loss. Figure 3 to Figure 4 outline the
temperature and airflow conditions required for a given load current. The area under the curve dictates the safe
operating area. All the curves are based on measurements made on a PCB design with dimensions of 4 inches
(W) × 3.5 inches (L) × 0.062 inch (T) and 6 copper layers of 1 oz. copper thickness.
6.1.3 Normalized Curves
The normalized curves in the CSD87381P data sheet provide guidance on the power loss and SOA adjustments
based on their application-specific needs. These curves show how the power loss and SOA boundaries adjust for
a given set of systems conditions. The primary y-axis is the normalized change in power loss, and the secondary
y-axis is the change is system temperature required in order to comply with the SOA curve. The change in power
loss is a multiplier for the power loss curve, and the change in temperature is subtracted from the SOA curve.
10
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