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SDN137 bảng dữ liệu(PDF) 3 Page - Solid State Optronic |
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SDN137 bảng dữ liệu(HTML) 3 Page - Solid State Optronic |
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3 / 12 page ![]() © 2012 Solid State Optronics • San José, CA www.ssousa.com • +1.408.293.4600 Page # 3 SDN137/H/S/TR Rev 1.10 (08/09/2012) 001512 SDN137 Digital High Speed Optocoupler 10MBd, Logic Output Electrical Characteristics, continued… TA = 25°C (unless otherwise specified) Parameter Symbol Min. Typ. Max. Units Test Conditions Isolation Specifications Input-Output Insulation Leakage Current II-O - - 1.0 μA 45% RH, t=5s, VI-O=3kV Withstand Insulation Test Voltage VISO 5000 - - VRMS RH ≤ 50%, t=1min Input-Output Resistance RI-O - 10 12 - VI-O = 500VDC Input-Output Capacitance CI-O - 1.0 - pF f=1MHz Notes 1. A 0.1 F or bigger bypass capacitor for VCC is needed as shown in Figure 1 2. Peaking driving circuit may be used to speed up the LED. The peak drive current of LED may go up to 50mA and maximum pulse width 50ns, as long as average current doesn’t exceed 20mA. 3. tPLH (propagation delay) is measured from the 3.75 mA point on the falling edge of the input pulse to the 1.5 V point on the rising edge of the output pulse. 4. tPHL (propagation delay) is measured from the 3.75 mA point on the rising edge of the input pulse to the 1.5 V point on the falling edge of the output pulse. 5. The tELH enable propagation delay is measured from the 1.5 V point on the falling edge of the enable input pulse to the 1.5 V point on the rising edge of the output pulse. 6. The tEHL enable propagation delay is measured from the 1.5 V point on the rising edge of the enable input pulse to the 1.5 V point on the falling edge of the output pulse. 7. CMH is the maximum tolerable rate of rise of the common mode voltage to assure that the output will remain in a high logic state (i.e., VO > 2.0 V). 8. CML is the maximum tolerable rate of fall of the common mode voltage to assure that the output will remain in a low logic state (i.e., VO < 0.8 V). 9. No external pull up is required for a high logic state on the enable input. If the enable pin is not used, tying it to VCC. 10. Device is considered a two-terminal device: pins 1, 2, 3, and 4 shorted together, and pins 5, 6, 7, and 8 shorted together. 11. In accordance with UL1577, each optocoupler is proof tested by applying an insulation test voltage 3000 VRMS for one second (leakage current less than 5 A). This test is performed before the 100% production test for partial discharge 12. In accordance with UL 1577, each optocoupler is proof tested by applying an insulation test voltage 6000 VRMS for one second (leakage current less than 5 A). This test is performed before the 100% production test for partial discharge Recommended Operating Conditions, TA = 25°C (unless otherwise specified) Parameter Symbol Min. Typ. Max. Units Test Conditions Operating Temperature °C -40 - 85 °C Supply Voltage VCC 4.5 - 5.5 V Low Level Input Current IFL 0 - 250 A High Level Input Current IFH 5 - 15 mA Low Level Enable Voltage VEL 0 - 0.8 V High Level Enable Voltage VEH 2 - VCC V Output Pull Up Resistor RL 330 - 4k Fan Out N - - 5 - RL = 1k |
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