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MAX9110ESA bảng dữ liệu(PDF) 7 Page - Maxim Integrated Products |
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MAX9110ESA bảng dữ liệu(HTML) 7 Page - Maxim Integrated Products |
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7 / 8 page ![]() Differential Traces Output trace characteristics affect the performance of the MAX9110/MAX9112. Use controlled impedance traces to match trace impedance to both transmission medium impedance and termination resistor. Eliminate reflections and ensure that noise couples as common mode by running the differential traces close together. Reduce skew by matching the electrical length of the traces. Excessive skew can result in a degradation of magnetic field cancellation. Maintain the distance between the differential traces to avoid discontinuities in impedance. Avoid 90° turns and minimize the number of vias to further prevent imped- ance discontinuities. Cables and Connectors Transmission media should have a differential charac- teristic impedance of about 100 Ω. Use cables and con- nectors that have matched impedance to minimize impedance discontinuities. Avoid the use of unbalanced cables, such as ribbon or simple coaxial cable. Balanced cables, such as twisted pair, offer superior signal quality and tend to generate less EMI due to canceling effects. Balanced cables tend to pick up noise as common mode, which is rejected by the LVDS receiver. Termination Termination resistors should match the differential char- acteristic impedance of the transmission line. Because the MAX9110/MAX9112 are current-steering devices, an output voltage will not be generated without a termi- nation resistor. Output voltage levels are dependent upon the termination resistor value. Resistance values may range between 75 Ω and 150Ω. Minimize the distance between the termination resistor and receiver inputs. Use a single 1% to 2% surface- mount resistor across the receiver inputs. Board Layout For LVDS applications, a four-layer PC board that pro- vides separate power, ground, LVDS signals, and input signals is recommended. Isolate the input and LVDS sig- nals from each other to prevent coupling. Separate the input and LVDS signal planes with the power and ground planes for best results. Single/Dual LVDS Line Drivers with Ultra-Low Pulse Skew in SOT23 _______________________________________________________________________________________ 7 MAX9110 TRANSISTOR COUNT: 765 MAX9112 TRANSISTOR COUNT: 765 PROCESS: CMOS Chip Information RT = 100 Ω 0.001 µF0.1µF +3.3V DIN_ MAX9110 MAX9112 MAX9111 MAX9113 OUT_ LVDS 0.001 µF0.1µF +3.3V RECEIVER DRIVER Typical Operating Circuit |
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