CMX983 datasheet(43/93 Pages) CMLMICRO

43 / 93 page

Analogue Front End (AFE) for Digital Radio

CMX983

 2015 CML Microsystems Plc

D/983/6

after each 16-bit coefficient value is written, so if the coefficients are written in an ascending

sequence the pointer only needs to be initialised once before each coefficient RAM is loaded.

TX_STATUS - $39: 8-bit Read

Reset value = $11

Bit:

Ch. B

bitsel

over-

flow

Ch. B

buffer

under-

run

Ch. B

idle

Ch. A

bitsel

over-

flow

Ch. A

buffer

under-

run

Ch. A

idle

TX_STATUS b7: Reserved, set to 0

TX_STATUS b6: Channel B bit selector overflow

This bit gets set to 1 when the channel B bit selector output value saturates to maximum positive

($7FFF) or maximum negative ($8000). This bit gets cleared only when TX_STATUS is read.

TX_STATUS b5: Channel B buffer underrun

This bit gets set to 1 whenever Tx channel B runs out of data from the serial port, for instance if the

Tx serial port gets disabled or is configured to run too slowly. When this happens, the Tx channel will

retransmit the previous data sample. The buffer underrun bit gets cleared only when TX_STATUS is

read.

TX_STATUS b4: Channel B idle

This bit is a level sensitive signal that is set to 1 whenever channel B is in the idle state.

TX_STATUS b3: Reserved, set to 0

TX_STATUS b2-0: (Channel A status bits)

Similar in operation to bits 6-4.

TX_ST_ENAB - $3A: 8-bit Write

Reset value = $00

Bit:

Tx status enable

(channel B)

Tx status enable

(channel A)

TX_ST_ENAB b7, b3: Reserved, set to 0

TX_ST_ENAB b6-4, b2-0: Tx status enable

If any of these bits is high while the corresponding bit in the TX_STATUS register is also high, then

the Tx status bit (in STATUS register bit 0) gets set to 1.

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