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US12231L-P20-R bảng dữ liệu(PDF) 6 Page - Unisonic Technologies

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nhà sản xuất  UTC [Unisonic Technologies]
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US12231
Preliminary
CMOS IC
UNISONICTECHNOLOGIESCO.,LTD
6 of 15
www.unisonic.com.tw
QW-R502-A82.a
ELECTRICAL CHARACTERISTICS(Cont.)
PARAMETER
SYMBOL
TEST CONDITIONS
MIN TYP MAX UNIT
LOGIC SECTION ( SYSRST , SHDNx , STBYx , PERSTx , RCLKENx, OCx , CPUSBx ,
CPPEx )
Logic Input Supply Current
Input
)
SYSRST
(
I
SYSRST =3.6V, sinking
0
1
μA
Input
)
SYSRST
(
I
SYSRST =0V, sourcing
0
1
μA
10
30
Input
)
SHDNx
(
I
SHDNx =3.6V, sinking
0
1
μA
SHDNx =0V, sourcing
10
30
Input
)
STBYx
(
I
STBYx =3.6V, sinking
0
1
μA
STBYx =0V, sourcing
10
30
Input
I(RCLKENx)
RCLKENx=0V, sourcing
10
30
μA
Inputs
)
CPUSBx
(
I
Or
)
CPPEx
(
I
CPUSB or CPPE =0V, sinking
0
1
μA
CPUSB or CPPE =3.6V,
sourcing
10
30
Logic Input Voltage
High Level
VIH
2
V
Low Level
VIL
0.8
RCLEN Output Low Voltage
Output
VOL(RCLEN)
IO(RCLKEN)=60μA
0.4
V
PERST Assertion Threshold Of Output
Voltage ( PERST Asserted When Any Output
Voltage Falls Below The Threshold)
VPG(3.3VIN)
3.3VOUT falling
2.7
3
V
VPG(AUXIN)
AUXOUT falling
2.7
3
VPG(1.5VIN)
1.5VOUT falling
1.2
1.35
PERST Assertion Delay From Output Voltage
)
PERST
(
FD
t
3.3VOUT, AUXOUT, or 1.5VOUT
falling
500 ns
PERST De-assertion Delay From Output
Voltage
)
PERST
(
RD
t
3.3VOUT, AUXOUT, and 1.5VOUT
rising within tolerance
4
10
20
ms
PERST Assertion Delay From SYSRST
)
PERST
(
FD
t
2
Max time from SYSRST asserted
or de-asserted
500 ns
PERST Minimum Pulse Width
)
PERST
(
W
t
3.3VOUT, AUXOUT, or 1.5VOUT
falling out of tolerance or
triggered by SYSRST
100 250
μs
PERST Output Low Voltage
)
PERST
(
OL
V
IO(PERST)=500μA
0.4
V
PERST Output High Voltage
)
PERST
(
OH
V
2.4
V
OC Output Low Voltage
)
OC
(
OL
V
IO(/OC)=2mA
0.4
V
OC Leakage Current
)
OC
(
IKG
I
VO(/OC)=3.6V
1
μA
OC Deglitch
)
OC
(
D
t
Falling into or out of an
overcurrent condition
6
20 mS
UNDERVOLTAGE LOCKOUT (UVLO)
3.3VIN UVLO
VUVLO(3.3VIN)
3.3VIN level, below which 3.3VIN
and 1.5VIN switches are off
2.6
2.9
V
1.5VIN UVLO
VUVLO(1.5VIN)
1.5VIN level, below which 3.3VIN
and 1.5VIN switches are off
1
1.25
AUXIN UVLO
VUVLO(AUXIN)
AUXIN level, below which all
switches are off
2.6
2.9
UVLO Hysteresis
∆VUVLO
100
mV
Note: Pulse-testing techniques maintain junction temperature close to ambient temperature; thermal effects must be
taken into account separately. ELECTRICAL CHARACTERISTICS(Cont.)



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