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UCD3138128 bảng dữ liệu(PDF) 61 Page - Texas Instruments |
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UCD3138128 bảng dữ liệu(HTML) 61 Page - Texas Instruments |
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61 / 80 page ![]() 3 A – QB1 ( DPWM1C ) 3 B – QT1 ( DPWM2 C) 2 B – QB2 ( EDGEGEN ) 2 A – QT 2 ( EDGEGEN) 0 B – QSYN 2,4 1 B – QSYN 1 ,3 Transformer Voltage X1 X3 X2 Y3 Y1 Y2 X1 , X2 , X 3 and Y1 , Y2 , Y 3 are sets of moving edges All other edges are fixed . DPWM 2 AF DPWM 2 BF DPWM3 AF DPWM3 BF Current Peak Level UCD3138128, UCD3138A64 www.ti.com SLUSBZ8A – JUNE 2014 – REVISED SEPTEMBER 2014 Here is an overview of the key PSFB signals: Figure 39. Key PSFB Signals 10.2.2.3 DPWM Synchronization DPWM1 is synchronized to DPWM0, DPWM2 is synchronized to DPWM1, and DPWM3 is synchronized to DPWM2, ½ period out of phase using these commands: Dpwm1Regs.DPWMCTRL0.bit.MSYNC_SLAVE_EN = 1; //configured to slave Dpwm2Regs.DPWMCTRL0.bit.MSYNC_SLAVE_EN = 1; // configured to slave Dpwm3Regs.DPWMCTRL0.bit.MSYNC_SLAVE_EN = 1; // configured to slave Dpwm0Regs.DPWMPHASETRIG.all = PWM_SLAVESYNC; Dpwm1Regs.DPWMPHASETRIG.all = PWM_SLAVESYNC; Dpwm2Regs.DPWMPHASETRIG.all = PWM_SLAVESYNC; LoopMuxRegs.DPWMMUX.bit.DPWM1_SYNC_SEL = 0; // Slave to dpwm-0 LoopMuxRegs.DPWMMUX.bit.DPWM2_SYNC_SEL = 1; // Slave to dpwm-1 LoopMuxRegs.DPWMMUX.bit.DPWM3_SYNC_SEL = 2; // Slave to dpwm-2 If the event registers on the DPWMs are the same, the two pairs of signals will be symmetrical. All code examples are taken from the PSFB EVM code, unless otherwise stated. Copyright © 2014, Texas Instruments Incorporated Submit Documentation Feedback 61 Product Folder Links: UCD3138128 UCD3138A64 |
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