Quad, 10-Bit, Low-Power, 2-Wire, Serial

Voltage-Output DAC

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13

SERIAL DATA INPUT

C3

C2

C1

C0

D9

D8

D7

D6

FUNCTION

11

10

X

X

X

X

Update all DAC outputs simultaneously. Device ignores D9-

D6. Do not send the data byte.

11

11

0

0

0

0

Extended command mode. The next word writes to the power-

down registers (Extended Command Mode).

11

11

0

0

0

1

followed by an address word with R/W = 1.

11

11

0

0

1

0

followed by an address word with R/W = 1.

11

11

0

1

0

0

followed by an address word with R/W = 1.

11

11

1

0

0

0

followed by an address word with R/W = 1.

Table 3. Command Byte Definitions (continued)

SA6

A5

A4

A3

A2

A1

A0

C3

C2

C1

C0

D9

D8

D7

D6

Sr

A6

A5

A4

A3

A2

A1

A0

MSB

LSB

MSB

LSB

LSB

MSB

ACK

ACK

ACK

D5

D4

D3

D2

D1

D0

S1

S0

MSB

LSB

ACK

ACK

P

R/W

= 1

XX

PD1

PD0

D9

D8

D7

D6

MSB

LSB

DATA BYTES GENERATED BY MASTER DEVICE

DATA BYTES GENERATED BY MAX5841

ACK GENERATED BY

MASTER DEVICE

R/W

= 0

Figure 8. Example Read Word Data Sequence