MAX531ACPD datasheet(5/16 Pages) MAXIM

5 / 16 page

+5V, Low-Power, Voltage-Output,

Serial 12-Bit DACs

_______________________________________________________________________________________

Note 2: In single-supply operation, INL and GE calculated from code 11 to code 4095. Tested at VDD = +5V.

Note 3: This specification applies to both gain-error power-supply rejection ratio and offset-error power-supply rejection ratio.

Note 4: Guaranteed by design.

Note 5: Tested at IOUT = 100µA. The reference can typically source up to 5mA (see Typical Operating Characteristics).

ELECTRICAL CHARACTERISTICS—Dual Supplies (MAX531 Only) (continued)

(VDD = +5V ±10%, VSS = -5V ±10%, AGND = DGND = 0V, REFIN = 2.048V (external), RFB = BIPOFF = VOUT, CREFOUT = 33µF,

RL = 10kΩ, CL = 100pF, TA = TMIN to TMAX, unless otherwise noted.)

PARAMETER

SYMBOL

MIN

TYP

MAX

UNITS

Voltage-Output Slew Rate

0.15

0.25

VDD

V/µs

4.5

5.5

ISC

Positive Supply Voltage

LSB

Negative Supply Voltage

Voltage-Output Settling Time

µs

Signal-to-Noise plus Distortion

nV-s

VSS

-5.5

Short-Circuit Current

Digital Feedthrough

SINAD

Output Load Regulation

VSS + 2

VDD - 2

Output Voltage Range

VSS + 0.4

VDD - 0.4

CONDITIONS

VOUT = 2V, RL = 2kΩ

To ±1/2LSB, VOUT = 2V

Step 000 hex to FFF hex

REFIN = 1kHz, 2Vp-p, (G = +1)

REFIN = 1kHz, 2Vp-p, (G = +2)

MAX531 (G = +1)

MAX531 (G = +2)

CS Setup Time

tCSS

SCLK Fall to

CS Fall Hold Time

tCSH0

SCLK Fall to

CS Rise Hold Time

tCSH1

SCLK High Width

tCH

SCLK Low Width

tCL

DIN Setup Time

tDS

DIN Hold Time

tDH

DOUT Valid Propagation Delay

tDO

CL = 50pF

CS High Pulse Width

tCSW

CLR Pulse Width

tCLR

CS Rise to SCLK Rise Setup Time

tCS1

Positive Supply Current

IDD

260

400

µA

All inputs = 0V or VDD, no load

Negative Supply Current

ISS

-120

-200

µA

All inputs = 0V or VDD, no load

VOLTAGE OUTPUT (VOUT)

DYNAMIC PERFORMANCE

POWER SUPPLY

SWITCHING CHARACTERISTICS

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