MAX522 datasheet(3/12 Pages) MAXIM

3 / 12 page

Dual, 8-Bit, Voltage-Output

Serial DAC in 8-Pin SO Package

_______________________________________________________________________________________

Note 2: Reduced digital code range (code 24 through code 232) is due to swing limitations of the output amplifiers. See

Typical

Operating Characteristics.

Note 3: Reference input resistance is code dependent. The lowest input resistance occurs at code 55hex. Refer to the

Reference

Input section in the Detailed Description.

Note 4: Guaranteed by design. Not production tested.

Note 5: Input capacitance is code dependent. The highest capacitance occurs at code 00hex.

CONDITIONS

UNITS

MIN

TYP

MAX

SYMBOL

PARAMETER

ELECTRICAL CHARACTERISTICS (continued)

(VDD = +2.7V to +5.5V, REF = VDD, TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25°C.)

Voltage-Output Slew Rate

CL = 0.1µF (DAC A), CL = 0.01µF (DAC B)

0.1

V/µs

Voltage-Output Settling Time

To ±1⁄2LSB

µs

Digital Feedthrough

and Crosstalk

All 0s to all 1s

nV-s

Supply Voltage Range

VDD

2.7

5.5

Shutdown Supply Current

VDD = 5.5V

0.1

µA

CL = 0.1µF (DAC A)

CL = 0.01µF (DAC B)

Supply Current

IDD

All inputs = 0V

1.3

2.8

0.9

2.5

DYNAMIC PERFORMANCE

POWER SUPPLIES

VDD = 5.5V

VDD = 3.6V

TIMING CHARACTERISTICS (Note 4)

(VDD = +2.7V to +5.5V, TA = TMIN to TMAX, unless otherwise noted.)

CONDITIONS

200

tCSPWH

–

—

–

Pulse Width High

100

tCL

SCLK Pulse Width Low

100

tCH

SCLK Pulse Width High

tDH

DIN to SCLK Rise Hold Time

tDS

DIN to SCLK Rise Setup Time

UNITS

MIN

TYP

MAX

SYMBOL

PARAMETER

150

tCSS

–

—

–

Fall to SCLK Rise Setup Time

150

tCSH

SCLK Rise to

–

—

–

Rise Setup Time

SERIAL INTERFACE TIMING

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