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ICS831742I bảng dữ liệu(PDF) 15 Page - Integrated Device Technology

tên linh kiện ICS831742I
Giải thích chi tiết về linh kiện  Maximum input/output clock frequency
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ICS831742I bảng dữ liệu(HTML) 15 Page - Integrated Device Technology

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ICS831742I Data Sheet
4:2 DIFFERENTIAL CLOCK/DATA MULTIPLEXER
ICS831742AGI JULY 10, 2012
15
©2012 Integrated Device Technology, Inc.
3. Calculations and Equations.
The purpose of this section is to calculate power dissipation on the IC per HCSL output pair.
HCSL output driver circuit and termination are shown in Figure 4.
Figure 4. HCSL Driver Circuit and Termination
HCSL is a current steering output which sources a maximum of 17mA of current per output. To calculate worst case on-chip power dissipation,
use the following equations which assume a 50
 load to ground.
The highest power dissipation occurs when VDD_MAX.
Power = (VDD_MAX – VOUT) * IOUT,
since VOUT = IOUT * RL
= (VDD_MAX – IOUT * RL) * IOUT
= (3.6V – 17mA * 50
) * 17mA
Total Power Dissipation per output pair = 46.8mW
VDD
VOUT
RL
50
Ω
IC
IOUT = 17mA
RREF =
475
Ω ± 1%



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