Low-Voltage, Low-On-Resistance,

SPST, CMOS Analog Switches

_______________________________________________________________________________________

7

50%

V+

0V

V+

GND

V+

IN

NO

COM

50

Ω

MAX4514

300

Ω

35pF

90%

90%

0V

50%

V+

0V

V+

GND

V+

IN

NC

COM

50

Ω

MAX4515

300

Ω

35pF

90%

90%

0V

Figure 2. Switching Times

_________________________________Test Circuits/Timing Diagrams (continued)

MEASUREMENTS ARE STANDARDIZED AGAINST

SHORT AT SOCKET TERMINALS. OFF ISOLATION IS

MEASURED BETWEEN COM AND “OFF” TERMINAL

ON EACH SWITCH. ON LOSS IS MEASURED BETWEEN

COM AND “ON” TERMINAL ON EACH SWITCH. SIGNAL

DIRECTION THROUGH SWITCH IS REVERSED; WORST

VALUES ARE RECORDED.

V+

V+

GND

V+

IN

NO

OR

NC

COM

MAX4514

MAX4515

OFF ISOLATION = 20log

ON LOSS = 20log

NETWORK

ANALYZER

50

Ω

50

Ω

50

Ω

50

Ω

MEAS

REF

10nF

Figure 3. Off Isolation and On Loss

V+

GND

V+

IN

NO

or

NC

COM

MAX4514

MAX4515

1MHz

CAPACITANCE

ANALYZER

AS

REQUIRED

Figure 4. NO, NC, and COM Capacitance