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FT122 bảng dữ liệu(PDF) 21 Page - Future Technology Devices International Ltd.

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Giải thích chi tiết về linh kiện  FT122 ENHANCED USB DEVICE CONTROLLER WITH PARALLEL BUS IC Datasheet Version 1.1
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Copyright © 2014 Future Technology Devices International Limited
21
Document No.: FT_000647
FT122 ENHANCED USB DEVICE CONTROLLER WITH PARALLEL
BUS
IC Datasheet Version 1.1
Clearance No.: FTDI#
313
Bit
Symbol
Reset
Description
5-4
Reserved
0b’00
Reserved, write to 0
6
SET_TO_ONE
0
This bit must be set to 1
7
SOF-only Interrupt
Mode
0
0: normal operation
1: interrupt will generate on receiving SOF packet only,
regardless the value of the Interrupt Pin Mode bit in DMA
configuration register.
Table 6-6 Clock Division Factor Register (Byte 2)
6.2.4 Set DMA
Command
: FBh
Data
: Read/Write 1 byte; Read/Write 2 bytes (for Enhanced Mode)
Bit
Symbol
Reset
Description
1-0
DMA Burst
0b’00
Set the DMA burst size
00: Single cycle mode
01: 4 cycle burst mode
10: 8 cycle burst mode
11: 16 cycle burst mode
2
DMA Enable
0
Enable DMA operation
0: DMA operation is disabled
1: DMA operation is enabled
FT122 will clear this bit upon EOT_n assertion.
3
DMA Direction
0
This bit indicates the DMA read or write operation.
0: DMA read. Data read from FT122 OUT buffer to
system memory.
1: DMA write. Data write to FT122 IN buffer from system
memory.
4
Auto Reload
0
Automatically restart the DMA operation.
0: DMA needs to restart by software
1: DMA will restart automatically after the previous DMA
transfer finishes
5
Interrupt Pin Mode
0
0: normal operation. Interrupt will generate if any of the
bit in the interrupt register is set.
1: interrupt will generate upon receiving SOF packet or if
any of the bit in the interrupt register is set.
6
EPI4 Interrupt Enable
0
Interrupt Enable for endpoint index 4. During DMA
operation, EPI4 interrupt should be turned off to avoid
un-necessary interrupt service.
For enhanced mode this bit has no function. EPI4
interrupt is always enabled unless it is selected as a DMA



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