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SCG3043 bảng dữ liệu(PDF) 2 Page - Connor-Winfield Corporation |
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SCG3043 bảng dữ liệu(HTML) 2 Page - Connor-Winfield Corporation |
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2 / 12 page ![]() Data Sheet #: SG094 Page 2 of 12 Rev: P00 Date: 11/17/04 © Copyright 2004 The Connor-Winfield Corp. All Rights Reserved Specifications subject to change without notice Absolute Maximum Rating Table 1 Symbol Parameter Minimum Nominal Maximum Units Notes V CC Power Supply Voltage -0.5 4 Volts 1 V I Input Voltage -0.5 5.5 Volts 1 T S Storage Temperature -65 150 deg. C 1 General Description The SCG3043 is a mixed signal phase locked loop generating 155.52 MHz LVPECL outputs from an intrinsically low jitter voltage controlled crystal oscillator. The SCG3043 is phase locked to an external 77.76 MHz reference input. The SCG3043 is ideal for applications using multiplication to obtain higher SONET frequencies. Functional Block Diagram Figure 1 Filter LVPECL Driver Low Jitter VCXO Divider REF Q1 QN1 Q2 QN2 The package dimensions are 0.75" x 1.25" x .45" on a 6 layer, designed impedance, FR4 board with castellated pins. Parts are assembled using high temperature solder to withstand surface mount reflow processes. See Fig. 4 for the solder profile. |
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