MAX3480ACPI datasheet(4/16 Pages) MAXIM

4 / 16 page

Complete, Isolated, 3.3V

RS-485/RS-422 Data Interface

_______________________________________________________________________________________

Note 1: All currents into device pins are positive; all currents out of device pins are negative. All voltages are referenced to

logic-side ground (GND1, GND2), unless otherwise specified.

Note 2: For DE

´ and DI´ pin descriptions, see Detailed Block Diagram and Typical Application Circuit (Figure 1 for

MAX3480A/MAX3480B).

Note 3: Shutdown supply current is the current at VCC1 when shutdown is enabled.

Note 4: Applies to peak current. See

Typical Operating Characteristics and Applications Information.

SWITCHING CHARACTERISTICS—MAX3480B

(VCC = VCC1 = VCC2 = VCC4 =VCC5 = 3.0V to 3.6V, FS = 0V, TA = TMIN to TMAX, unless otherwise noted. Typical values are at

VCC = VCC1 = VCC2 = VCC4 = VCC5 = 3.3V and TA = +25°C.)

PARAMETER

SYMBOL

MIN

TYP

MAX

UNITS

tPLH - tPHL Differential

Receiver Skew

tPLH

1.0

2.0

Driver Input to Output

Propagation Delay

µs

Driver Output Skew

tSKEW

100

800

Driver Rise or Fall Time

tR, tF

1.0

2.0

µs

Driver Enable to Output High

tZH

100

µs

Driver Enable to Output Low

tZL

100

µs

Driver Disable Time from Low

tLZ

µs

CONDITIONS

Figures 4, 6; RDIFF = 54Ω,

CL1 = CL2 = 100pF

Figures 5, 7; CL = 100pF, S2 closed

Figures 5, 7; CL = 100pF, S1 closed

Figures 4, 6; RDIFF = 54Ω,

CL1 = CL2 = 100pF

Figures 4, 6; RDIFF = 54Ω,

CL1 = CL2 = 100pF

Figures 5, 7; CL = 15pF, S1 closed

Driver Disable Time from High

tHZ

µs

Figures 5, 7; CL = 15pF, S2 closed

tSKD

tPLH

0.8

2.0

Receiver Input to Output

Propagation Delay

tPHL

0.8

2.0

µs

Figures 4, 8; RDIFF = 54Ω,

CL1 = CL2 = 100pF

Figures 4, 8; RDIFF = 54Ω,

CL1 = CL2 = 100pF

Maximum Data Rate

fMAX

0.25

Mbps

tPLH, tPHL < 50% of data period

tPHL

1.0

2.0

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