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MAX3264C/D bảng dữ liệu(PDF) 7 Page - Maxim Integrated Products

tên linh kiện MAX3264C/D
Giải thích chi tiết về linh kiện  3.0V to 5.5V, 1.25Gbps/2.5Gbps Limiting Amplifiers
PDF  17 Pages
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nhà sản xuất  MAXIM [Maxim Integrated Products]
Trang chủ  https://www.maximintegrated.com/en.html
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MAX3264C/D bảng dữ liệu(HTML) 7 Page - Maxim Integrated Products

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+3.0V to +5.5V, 1.25Gbps/2.5Gbps
Limiting Amplifiers
_______________________________________________________________________________________
7
Pin Description
EP
EP
Ground. The exposed paddle must be soldered to the circuit–board ground for
proper thermal performance.
Exposed
Paddle
—
7
Output Current Level. When this pin is not connected, the CML output current is
approximately 16mA. When this pin is connected to ground, the output current
increases to approximately 20mA. (In the MAX3265CUB/MAX3765CUB, LEVEL is
internally connected to ground.)
—
15
Squelch Input. The squelch function is disabled when SQUELCH is not connected
or is set to a TTL low level. When SQUELCH is set to a TTL high level and LOS is
asserted, the data outputs, OUT+, and OUT-, are forced to static levels. See sec-
tions PECL Output Buffer and CML Output Buffer for more information. (In the
MAX3265/MAX3268/MAX3269 10-pin µMAX, SQUELCH is not connected. In the
MAX3765/MAX3768, SQUELCH is internally connected to VCC.)
—
16
No Connection
N.C.
SQUELCH
—
10
Noninverted Loss-of-Signal Output. LOS is low when the level of the input signal
is above the preset threshold set by the TH input. LOS asserts high when the sig-
nal level drops below the threshold.
LOS
LEVEL
—
1
Offset-Correction-Loop Capacitor. A capacitor connected between this pin and
CAZ2 extends the time constant of the offset correction loop.
—
2
Offset-Correction-Loop Capacitor. A capacitor connected between this pin and
CAZ1 extends the time constant of the offset correction loop. Refer to Design
Procedure.
CAZ2
CAZ1
6
9
Inverted Loss-of-Signal Output. LOS is high when the level of the input signal is
above the preset threshold set by the TH input. LOS is asserted low when the
signal level drops below the threshold.
8
12
Inverted Data Output
9
13
Noninverted Data Output
OUT+
OUT-
7, 10
11, 14
Supply Voltage
VCC
LOS
3
5
Inverted Input Signal
5
8
Loss-of-Signal Threshold. A resistor connected from this pin to ground sets the
input signal level at which the loss-of-signal (LOS) output(s) is asserted. Refer to
Typical Operating Characteristics and Design Procedure.
TH
IN-
2
4
Noninverted Input Signal
IN+
TSSOP
FUNCTION
µMAX
NAME
GND
1, 4
3, 6
Supply Ground
PIN



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