Preliminary Datasheet

LP3315

LP3315– 00 Version1.0 Datasheet

Feb.-2012

www.lowpowersemi.com

Page 7 of 8

junction to ambient thermal resistance.

For the recommended operating conditions specification of LP3315, the maximum junction temperature of the die

is 125°C. The junction to ambient thermal resistance Qja is layout dependent. The junction to ambient thermal

resistance for SOT23-5 package is 255°C/W and for WDFN-8L 2x2 package is 165°C/W on the standard JEDEC

51-3 single layer thermal test board. The maximum power dissipation at TA = 25°C can be calculated by

following formula :

Layout Consideration

For best performance of the LP3315, the following

guidelines must be strictly followed.

- Input and Output capacitors should be placed close to the IC and connected to ground plane to reduce noise

coupling.

- The GND and Exposed Pad should be connected to a strong ground plane for heat sinking and noise protection.

- Keep the main current traces as possible as short and wide.

- LX node of DC-DC converter is with high frequency voltage swing. It should be kept at a small area.

- Place the feedback components as close as possible to the IC and keep away from the noisy devices.