P4C1681-35JM datasheet(4/10 Pages) PYRAMID

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P4C1681, P4C1682

Page 4 of 10

Document # SRAM109 REV A

Notes:

5. WE is HIGH for READ cycle.

6. CE is LOW for READ cycle.

7. ADDRESS must be valid prior to, or coincident with, CE

transition LOW.

-12

-15

-20

-25

-35

Min Max Min Max Min Max Min

Max Min Max

Read Cycle Time

Address Access

Time

Chip Enable

Access Time

Output Hold from

Address Change

Chip Enable to

Output in Low Z

Chip Disable to

Output in High Z

RCS

ReadCommand

Setup Time

RCH

ReadCommand

Hold Time

Chip Enable to

Power Up Time

Chip Disable to

Power Down Time

READ CYCLE NO. 1 (ADDRESS controlled)(5, 6)

READ CYCLE NO. 2 (CE

CE controlled)(5, 7)

8. Transition is measured ±200mV from steady state voltage prior to

change, with loading as specified in Figure 1.

9. Read Cycle Time is measured from the last valid address to the first

transitioning address.

Symbol

Parameter

Unit

AC ELECTRICAL CHARACTERISTICS—READ CYCLE

CC = 5V ± 10%, All Temperature Ranges)

(2)

1552 Tbl 10

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