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ES9018K2M bảng dữ liệu(PDF) 2 Page - ESS Technology,Inc |
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ES9018K2M bảng dữ liệu(HTML) 2 Page - ESS Technology,Inc |
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2 / 2 page ![]() CONFIDENTIAL ADVANCE INFORMATION Rev. 2.1 October 16, 2014 ES9018K2M Product Brief ESS TECHNOLOGY, INC. 48401 Fremont Blvd., Fremont, CA 94538, USA Tel (510) 492-1088 • Fax (510) 492-1511 2 FUNCTIONAL BLOCK DIAGRAM TYPICAL MOBILE APPLICATION DIAGRAM No part of this publication may be reproduced, stored in a retrieval system, transmitted, or translated in any form or by any means, electronic, mechanical, manual, optical, or otherwise, without the prior written permission of ESS Technology, Inc. ESS Technology, Inc. makes no representations or warranties regarding the content of this document. All specifications are subject to change without prior notice. ESS Technology, Inc. assumes no responsibility for any errors contained herein. U.S. patents pending. PCM / DSD / SPDIF Interface ASRC & Jitter Reduction OVERSAMPLING FILTER Fast/Slow roll-off (PCM) 50/60/70kHz (DSD) De-emphasis (PCM) Volume Control Soft Mute Zero Detect CONTROL INTERFACE Core & IO Power Supply 32-bit HyperstreamTM DAC (2x) 32-bit HyperstreamTM DAC (2x) Dynamic Matching (2x) DAC Power Supply DATA_CLK DVCC (1.8/3.3V) GND XI / MCLK XO DPLL DATA[2:1] DACL, DACR DACLB, DACRB ES9018K2M AVCC_L, AVCC_R (3.3V) Core Voltage OSC VCCA (3.3V) DVDD |
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