LTC6946_15 datasheet(21/32 Pages) LINER

21 / 32 page

LTC6946

6946fb

For more information www.linear.com/LTC6946

operaTion

Addr0 + Rd

DON’T CARE

Hi-Z

MASTER–CS

MASTER–SDI

LTC6946–SDO

6946 F13

Byte 0

Byte 1

Byte 2

Figure 13. Serial Port Auto-Increment Read

beginning with data from register Addr0. The part ignores

all other data on SDI until the end of the burst.

Multidrop Configuration

Several LTC6946s may share the serial bus. In this mul-

tidrop configuration, SCLK, SDI, and SDO are common

betweenallparts.Theserialbusmastermustuseaseparate

CS for each LTC6946 and ensure that only one device has

CS asserted at any time. It is recommended to attach a

high value resistor to SDO to ensure the line returns to a

known level during Hi-Z states.

Serial Port Registers

ThememorymapoftheLTC6946maybefoundinTable 11,

withdetailedbitdescriptionsfoundinTable12.Theregister

address shown in hexadecimal format under the ADDR

column is used to specify each register. Each register is

denoted as either read-only (R) or read-write (R/W). The

is shown at the right.

The read-only register at address h00 is used to determine

different status flags. These flags may be instantly output

on the STAT pin by configuring register h01. See the STAT

Output section for more information.

The read-only register at address h0B is a ROM byte for

device identification.

Table 11. Serial Port Register Contents

ADDR

MSB

[6]

[5]

[4]

[3]

[2]

[1]

LSB

R/W

DEFAULT

h00

UNLOCK

ALCHI

ALCLO

LOCK

THI

TLO

h01

x[5]

x[4]

x[3]

x[2]

x[1]

x[0]

R/W

h04

h02

PDALL

PDPLL

PDVCO

PDOUT

PDREFO

MTCAL

OMUTE

POR

R/W

h0E

h03

BD[3]

BD[2]

BD[1]

BD[0]

RD[9]

RD[8]

R/W

h30

h04

RD[7]

RD[6]

RD[5]

RD[4]

RD[3]

RD[2]

RD[1]

RD[0]

R/W

h01

h05

ND[15]

ND[14]

ND[13]

ND[12]

ND[11]

ND[10]

ND[9]

ND[8]

R/W

h00

h06

ND[7]

ND[6]

ND[5]

ND[4]

ND[3]

ND[2]

ND[1]

ND[0]

R/W

hFA

h07

ALCEN

ALCMON

ALCCAL

ALCULOK

CAL

LKEN

R/W

h21

h08

BST

FILT[1]

FILT[0]

RFO[1]

RFO[0]

OD[2]

OD[1]

OD[0]

R/W

hF9

h09

LKWIN[1]

LKWIN[0]

LKCT[1]

LKCT[0]

CP[3]

CP[2]

CP[1]

CP[0]

R/W

h9B

h0A

CPCHI

CPCLO

CPMID

CPINV

CPWIDE

CPRST

CPUP

CPDN

R/W

hE4

h0B

REV[2]

REV[1]

REV[0]

PART[4]

PART[3]

PART[2]

PART[1]

PART[0]

hxx†

*unused †varies depending on version

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