LTC690 datasheet(10/16 Pages) LINER

10 / 16 page

LTC690/LTC691

LTC694/LTC695

APPLICATI

I FOR ATIO

Figure 5. Timing Diagram for CE IN and CE OUT

If battery connections are made through long wires, a 10

Ω

to 100

Ω series resistor and a 0.1µF capacitor are recom-

mended to prevent any overshoot beyond VCC due to the

lead inductance (Figure 4).

OUT is an alternative signal to drive the CE, CS, or Write

input of battery-backed up CMOS RAM. CE OUT can also

be used to drive the Store or Write input of an EEPROM,

EAROM or NOVRAM to achieve similar protection. Figure

5 shows the timing diagram of CE IN and CE OUT.

CE IN can be derived from the microprocessor’s address

decoder output. Figure 6 shows a typical nonvolatile

CMOS RAM application.

Memory protection can also be achieved with the LTC690

and LTC694 by using RESET as shown in Figure 7.

4.3M

0.1

µF

VBATT

LTC690

LTC691

LTC694

LTC695

GND

690 F04

Ω

Figure 4. 10

Ω/0.1µF Combination Eliminates Inductive

Overshoot and Prevents Spurious Resets During Battery

Replacement

Memory Protection

The LTC691 and LTC695 include memory protection

circuitry that ensures the integrity of the data in memory

by preventing write operations when VCC is at invalid level.

Two additional pins, CE IN and CE OUT, control the Chip

Enable or Write inputs of CMOS RAM. When VCC is 5V, CE

OUT follows CE IN with a typical propagation delay of

20ns. When VCC falls below the reset voltage threshold or

VBATT, CE OUT is forced high, independent of CE IN. CE

Table 1 shows the state of each pin during battery back-up.

When the battery switchover section is not used, connect

VBATT to GND and VOUT to VCC.

SIGNAL

STATUS

VCC

C2 monitors VCC for active switchover.

VOUT

VOUT is connected to VBATT through an internal PMOS switch.

VBATT

The supply current is 1

µA maximum.

BATT ON

Logic high. The open-circuit output voltage is equal to VOUT.

PFI

Power failure input is ignored.

PFO

Logic low

RESET

Logic low

RESET

Logic high. The open-circuit output voltage is equal to VOUT.

LOW LINE Logic low

WDI

Watchdog input is ignored.

WDO

Logic high. The open-circuit output voltage is equal to VOUT.

CE IN

Chip Enable Input is ignored.

CE OUT

Logic high. The open-circuit output voltage is equal to VOUT.

OSC IN

OSC IN is ignored.

OSC SEL

OSC SEL is ignored.

Table 1. Input and Output Status in Battery Back-Up Mode

VCC

CE IN

VOUT = VBATT

CE OUT

VOUT = VBATT

V1 = RESET VOLTAGE THRESHOLD

V2 = RESET VOLTAGE THRESHOLD +

RESET THRESHOLD HYSTERESIS

690 F05

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