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LTC2402CMS bảng dữ liệu(PDF) 9 Page - Linear Technology |
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LTC2402CMS bảng dữ liệu(HTML) 9 Page - Linear Technology |
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9 / 12 page ![]() 9 LTC2401/LTC2402 APPLICATIO S I FOR ATIO Figure 6. Embedded Selected Channel Indicator 24012 F06 SCK SDO CH1 • • • • • • CH1 DATA OUT CH0 DATA OUT EOC CH0 EOC is alternated. Embedded within the serial data output is a status bit indicating which channel corresponds to the conversion result. If the conversion was performed on CH0, this bit (Bit 30) is LOW and is HIGH if the conversion was performed on CH1 (see Figure 6). There are no extra control or status pins required to perform the alternating 2-channel measurements. The LTC2402 only requires two digital signals (SCK and SDO). This simplification is ideal for isolated temperature mea- surements or systems where minimal control signals are available. Pseudo Differential Applications Generally, designers choose fully differential topologies for several reasons. First, the interface to a 4- or 6-wire bridge is simple (it is a differential output). Second, they require good rejection of line frequency noise. Third, they typically look at a small differential signal sitting on a large common mode voltage; they need accurate measurements of the differential signal independent of the common mode input voltage. Many applications currently using fully differential analog-to-digital con- verters for any of the above reasons may migrate to a pseudo differential conversion using the LTC2402. Direct Connection to a Full Bridge The LTC2402 interfaces directly to a 4- or 6-wire bridge, as shown in Figure 7. Like the LTC2401, the LTC2402 in- cludes a FSSET and a ZSSET for sensing the excitation voltage directly across the bridge. This eliminates errors due to excitation currents flowing through parasitic resis- tors. The LTC2402 also includes two single ended input channels which can tie directly to the differential output of the bridge. The two conversion results may be digitally subtracted yielding the differential result. VCC LTC2402 FSSET ZSSET SCK CH1 SDO FO CS CH0 GND 3-WIRE SPI INTERFACE 1 5V 9 8 7 10 24012 F07 2 350 Ω 350 Ω 350 Ω 350 Ω 3 4 5 IDC = 0 IEXCITATION IDC = 0 Figure 7. Pseudo Differential Strain Guage Application |
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