LTC1668I datasheet(6/16 Pages) LINER

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LTC1668

APPLICATIO S I FOR ATIO

Theory of Operation

The LTC1668 is a high speed current steering 16-Bit DAC

made on an advanced BiCMOS process. Precision thin

film resistors and well matched bipolar transistors result

in excellent DC linearity and stability. A low glitch current

switching design gives excellent AC performance at sample

rates up to 50Msps. The device is complete with a 2.5V

internal bandgap reference and edge triggered latches,

and sets a new standard for DAC applications requiring

very high dynamic range at output frequencies up to

several megahertz.

Referring to the Block Diagram, the DAC contains an array

of current sources that are steered to IOUTA or IOUTB with

NMOS differential current switches. The four most signifi-

cant bits, DB15 to DB12 are made up of 15 current

segments of equal weight. The lower bits, DB11 to DB0 are

binary weighted, using a combination of current scaling

and a differential resistive attenuator ladder. All bits and

segments are precisely matched, both in current weight

for DC linearity, and in switch timing for low glitch impulse

and low spurious tone AC performance.

Setting the Full-Scale Current, IOUTFS

The full-scale DAC output current, IOUTFS, is nominally

10mA, and can be adjusted down to 1mA. Placing a

resistor, RSET, between the REFOUT pin, and the IREFIN pin

sets IOUTFS as follows.

The internal reference control loop amplifier maintains a

virtual ground at IREFIN by servoing the internal current

source, IINT, to sink the exact current flowing into IREFIN.

IINT is a scaled replica of the DAC current sources and

IOUTFS = 8 • (IINT), therefore:

IOUTFS = 8 • (IREFIN) = 8 • (VREF/RSET)

(1)

For example, if RSET = 2k and is tied to VREF = REFOUT =

2.5V, IREFIN = 2.5/2k = 1.25mA and IOUTFS = 8 • (1.25mA)

= 10mA.

The reference control loop requires a capacitor on the

COMP1 pin for compensation. For optimal AC perfor-

mance, CCOMP1 should be connected to VSS and be placed

very close to the package (less than 0.1").

For fixed reference voltage applications, CCOMP1 should

be 0.1

µF or more. The reference control loop small-signal

bandwidth is approximately 1/(2

π)•CCOMP1•80or20kHz

for CCOMP1 = 0.1µF.

Internal Reference Output—REFOUT

The onboard 2.5V bandgap voltage reference drives the

REFOUT pin. It is trimmed and specified to drive a 2k

resistor tied from REFOUT to IREFIN, corresponding to a

1.25mA load (IOUTFS = 10mA). REFOUT has nominal

output impedance of 6

Ω, or 0.24% per mA, so it must be

buffered to drive any additional external load. A 0.1

µF

capacitor is required on the REFOUT pin for compensa-

tion. Note that this capacitor is required for stability, even

if the internal reference is not being used.

DAC Transfer Function

The LTC1668 uses straight binary digital coding. The

complementary current outputs, IOUT A and IOUT B, sink

current from 0 to IOUTFS. For IOUTFS = 10mA (nominal),

IOUT A swings from 0mA when all bits are low (i.e., Code =

0) to 10mA when all bits are high (i.e., Code = 65535) (deci-

mal representation). IOUT B is complementary to IOUT A.

IOUT A and IOUT B are given by the following formulas:

IOUT A = IOUTFS • (DAC Code/65536)

(2)

IOUT B = IOUTFS • (65535-DAC Code)/65536

(3)

In typical applications, the LTC1668 differential output

currents either drive a resistive load directly or drive an

equivalent resistive load through a transformer, or as the

feedback resistor of an I-to-V converter. The voltage

outputs generated by the IOUT A and IOUT B output currents

are then:

VOUT A = IOUT A • RLOAD

(4)

VOUT B = IOUT B • RLOAD

(5)

The differential voltage is:

VDIFF = VOUT A – VOUT B

(6)

= (IOUT A – IOUT B) • (RLOAD)

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