LTC1415CSW datasheet(15/24 Pages) LINER

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LTC1415

APPLICATIONS INFORMATION

width for these tracks should be as wide as possible. In

applications where the ADC data outputs and control

signals are connected to a continuously active micropro-

cessor bus, it is possible to get errors in the conversion

results. These errors are due to feedthrough from the

microprocessor to the successive approximation com-

parator. The problem can be eliminated by forcing the

microprocessor into a WAIT state during conversion or by

using three-state buffers to isolate the ADC data bus. The

traces connecting the pins and bypass capacitors must be

kept short and should be made as wide as possible.

The LTC1415 has differential inputs to minimize noise

coupling. Common mode noise on the + AIN and –AIN

leads will be rejected by the input CMRR. The – AIN input

can be used as a ground sense for the + AIN input; the

LTC1415 will hold and convert the difference voltage

between + AIN and –AIN. The leads to + AIN (Pin 1) and –AIN

(Pin 2) should be kept as short as possible. In applications

where this is not possible, the + AINand – AIN traces should

be run side by side to equalize coupling.

SUPPLY BYPASSING

High quality, low series resistance ceramic, 10

µF bypass

capacitors should be used at the VDD and REFCOMP pins

as shown in the Typical Application on the fist page of this

data sheet. Surface mount ceramic capacitors such as

Murata GRM235Y5V106Z016 provide excellent bypass-

ing in a small board space. Alternatively 10

µF tantalum

capacitors in parallel with 0.1

µF ceramic capacitors can be

used. Bypass capacitors must be located as close to the

pins as possible. The traces connecting the pins and the

bypass capacitors must be kept short and should be made

as wide as possible.

Example Layout

Figures 13a, 13b, 13c and 13d show the schematic and

layout of a suggested evaluation board. The layout demon-

strates the proper use of decoupling capacitors and ground

plane with a two layer printed circuit board.

LTC1415 • F12

+AIN

AGND

REFCOMP

AVDD

DVDD

OGND

LTC1415

DIGITAL

SYSTEM

0.1

µF

–

ANALOG

INPUT

CIRCUITRY

OVDD

DGND

0.1

µF

–AIN

ANALOG GROUND PLANE

Figure 12. Power Supply Grounding Practice

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