LTC1553_15 datasheet(7/24 Pages) LINER

7 / 24 page

LTC1553

PIN FUNCTIONS

VID0, VID1, VID2, VID3, VID4 (Pins 18, 17, 16, 15, 14):

Digital Voltage Select. TTL inputs used to set the regulated

output voltage required by the processor (Table 3). There

is an internal 20k

Ω pull-up at each pin. When all five VIDn

pins are high or floating, the chip will shut down.

OUTEN (Pin 19): Output Enable. TTL input which enables

the output voltage. The external MOSFET temperature can

be monitored with an external thermistor as shown in

Figure 13. When the OUTEN input voltage drops below 2V,

OT trips. As OUTEN drops below 1.7V, the drivers are

internally disabled to prevent the MOSFETs from heating

further. If OUTEN is less than 1.2V for longer than 30

µs,

the LTC1553 will enter shutdown mode. The internal

oscillator can be synchronized to a faster external clock by

applying the external clocking signal to the OUTEN pin.

G1 (Pin 20): Gate Drive for the Upper N-Channel MOSFET,

Q1. This output will swing from PVCC to GND. It will always

be low when G2 is high or the output is disabled.

BLOCK DIAGRAM

VID0

VID1

VID2

VID3

VID4

OUTEN 19

COMP

PVCC

1553 BD

SENSE

–

PWM

SYSTEM

POWER

DOWN

DISDR

VREF

ISS

QSS

115% VREF

VREF

0.5VREF/

0.7VREF

HCL MONO

MHCL

VREF – 5%

VREF + 5%

DELAY

DAC

LOGIC

MAX

–

MIN

–

ERR

–

IMAX

IFB

PWRGD

–

LVC

FAULT

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