LT1206CS8 datasheet(9/16 Pages) LINER

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LT1206

APPLICATI

I FOR ATIO

FREQUENCY (MHz)

–8

–4

100

LT1206 • F01

–6

–2

VS = ±15V

RF = 1.2k

COMPENSATION

RF = 2k

NO COMPENSATION

RF = 2k

COMPENSATION

Figure 1.

which is flat to 0.35dB to 30MHz. The network has the

greatest effect for CL in the range of 0pF to 1000pF. The

graph of Maximum Capacitive Load vs Feedback Resistor

can be used to select the appropriate value of feedback

resistor. The values shown are for 0.5dB and 5dB peaking

at a gain of 2 with no resistive load. This is a worst case

condition, as the amplifier is more stable at higher gains

and with some resistive load in parallel with the capaci-

tance. Also shown is the – 3dB bandwidth with the sug-

gested feedback resistor vs the load capacitance.

Although the optional compensation works well with

capacitive loads, it simply reduces the bandwidth when it

is connected with resistive loads. For instance, with a 30

Ω

load, the bandwidth drops from 55MHz to 35MHz when

the compensation is connected. Hence, the compensation

was made optional. To disconnect the optional compensa-

tion, leave the COMP pin open.

Shutdown/Current Set

If the shutdown feature is not used, the SHUTDOWN pin

must be connected to ground or V –.

The shutdown pin can be used to either turn off the biasing

for the amplifier, reducing the quiescent current to less

than 200

µA, or to control the quiescent current in normal

operation.

The total bias current in the LT1206 is controlled by the

current flowing out of the shutdown pin. When the shut-

down pin is open or driven to the positive supply, the part

is shut down. In the shutdown mode, the output looks like

a 40pF capacitor and the supply current is typically 100

µA.

The shutdown pin is referenced to the positive supply

through an internal bias circuit (see the simplified sche-

matic). An easy way to force shutdown is to use open drain

(collector) logic. The circuit shown in Figure 2 uses a

74C904 buffer to interface between 5V logic and the

LT1206. The switching time between the active and shut-

down states is less than 1

µs. A 24k pull-up resistor

speeds up the turn-off time and insures that the LT1206

is completely turned off. Because the pin is referenced to

the positive supply, the logic used should have a break-

down voltage of greater than the positive supply voltage.

No other circuitry is necessary as the internal circuit

limits the shutdown pin current to about 500

µA. Figure 3

shows the resulting waveforms.

LT1206 • F3

AV = 1

RF = 825Ω

RL = 50Ω

RPU = 24k

VIN = 1VP-P

Figure 3. Shutdown Operation

–

LT1206

S/D

15V

–15V

VIN

24k

ENABLE

VOUT

LT1206 • F02

15V

74C906

Figure 2. Shutdown Interface

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