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AN4277 bảng dữ liệu(PDF) 13 Page - STMicroelectronics |
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AN4277 bảng dữ liệu(HTML) 13 Page - STMicroelectronics |
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13 / 23 page ![]() DocID024409 Rev 2 13/23 AN4277 Examples 22 Comparator 4 output is connected internally to TIM1 BRK and filter is not configured. Low The PWM signal is stopped during the break signal low level, as shown in the following screen shot: Comparator 4 output is connected internally to TIM1 BRK and filter is configured. High During the window defined by the filter duration, the break event has no impact on the PWM generation even if the break condition is verified. This is the case of the following example (screen shot) where the PWM signal is generated normally when the break signal is at high level during the window defined by the filter. – The filter duration is 666 ns (BKF = 1000b, Filter duration is (6*8/fDTS), fDTS = 72 MHz). – The comparator output high level duration is 1.207 µs. Table 3. Scenarios of PWM output status in response to internal/external break events (continued) Configuration Programmed polarity Result |
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