AN3216 datasheet(25/33 Pages) STMICROELECTRONICS

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DocID17496 Rev 7

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AN3216

Recommendations

6.1

Printed circuit board

For technical reasons, it is best to use a multilayer printed circuit board (PCB) with a

separate layer dedicated to ground (VSS) and another dedicated to the VDD supply. This

provides good decoupling and a good shielding effect. For many applications, economical

reasons prohibit the use of this type of board. In this case, the major requirement is to

ensure a good structure for ground and for the power supply.

6.2

Component position

A preliminary layout of the PCB must make separate circuits:

•

High-current circuits

•

Low-voltage circuits

•

Digital component circuits

•

Circuits separated according to their EMI contribution. This will reduce cross-coupling

on the PCB that introduces noise.

6.3

Ground and power supply (VSS, VDD, VSSA, VDDA)

Every block (noisy, low-level sensitive, digital, etc.) should be grounded individually, and all

ground returns should be to a single point. Loops must be avoided or have a minimum area.

In order to improve analog performance, you must use separate supply sources for VDD and

VDDA, and place the decoupling capacitors as close as possible to the device. The power

supplies should be implemented close to the ground line to minimize the area of the

supplies loop. This is due to the fact that the supply loop acts as an antenna, and acts as the

main transmitter and receiver of EMI. All component-free PCB areas must be filled with

additional grounding to create a kind of shielding (especially when using single-layer PCBs).

6.4

Decoupling

All power supply and ground pins must be properly connected to the power supplies. These

connections, including pads, tracks and vias should have as low an impedance as possible.

This is typically achieved with thick track widths and, preferably, the use of dedicated power

supply planes in multilayer PCBs.

In addition, each power supply pair should be decoupled with filtering ceramic capacitors C

(100 nF) and a Tantalum or Ceramic capacitor C of about 10 µF connected in parallel on the

STM32L1xxx device. These capacitors need to be placed as close as possible to, or below,

the appropriate pins on the underside of the PCB. Typical values are 10 nF to 100 nF, but

exact values depend on the application needs. Figure 15 shows the typical layout of such a

VDD/VSS pair.

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