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LT1990 bảng dữ liệu(PDF) 9 Page - Linear Technology

tên linh kiện LT1990
Giải thích chi tiết về linh kiện  Micropower, Difference Amplifier
PDF  16 Pages
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nhà sản xuất  LINER [Linear Technology]
Trang chủ  http://www.linear.com
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LT1990 bảng dữ liệu(HTML) 9 Page - Linear Technology

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LT1990
9
1990fb
LT1990H
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
VOSH
Input Offset Voltage Hysteresis, RTI
(Note 11)
●
250
µV
PSRR
Power Supply Rejection Ratio, RTI
VS = ±1.35V to ±18V
●
77
dB
Minimum Supply Voltage
Guaranteed by PSRR
●
±1.35
V
IS
Supply Current
●
330
µA
VOUT
Output Voltage Swing
●
±14.2
V
ISC
Output Short-Circuit Current
Short to V–
●
1.5
mA
Short to V+
●
7mA
SR
Slew Rate
G = 1, VOUT = ±10V
●
0.1
V/
µs
±15V ELECTRICAL CHARACTERISTICS
The
● denotes the specifications which apply over the temperature range of –40
°C ≤ TA ≤ 125°C. VS = ±15V, RL = 10k, VCM = VREF = 0V,
G = 1, 10, unless otherwise noted. (Notes 4, 6)
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: ESD (Electrostatic Discharge) sensitive device. Extensive use of
ESD protection devices are used internal to the LT1990, however, high
electrostatic discharge can damage or degrade the device. Use proper ESD
handling precautions.
Note 3: A heat sink may be required to keep the junction temperature
below absolute maximum.
Note 4: The LT1990C/LT1990I are guaranteed functional over the
operating temperature range of – 40
°C to 85°C. The LT1990H is
guaranteed functional over the operating temperature range of –40
°C
to 125
°C.
Note 5: The LT1990C is guaranteed to meet the specified performance
from 0
°C to70°C and is designed, characterized and expected to meet
specified performance from –40
°C to 85°C but is not tested or QA
sampled at these temperatures. The LT1990I is guaranteed to meet
specified performance from –40
°C to 85°C. The LT1990H is guaranteed to
meet specified performance from –40
°C to 125°C.
Note 6: G = 10 limits are guaranteed by correlation to G = 1 tests and gain
error tests at G = 10.
Note 7: Limits are guaranteed by correlation to –5V to 80V CMRR tests.
Note 8: VS = 3V limits are guaranteed by correlation to VS = 5V and
VS = ±15V tests.
Note 9: VS = 5V limits are guaranteed by correlation to VS = 3V and
VS = ±15V tests.
Note 10: This parameter is not 100% tested.
Note 11: Hysteresis in offset voltage is created by package stress that
differs depending on whether the IC was previously at a higher or lower
temperature. Offset voltage hysteresis is always measured at 25
°C, but the
IC is cycled to 85
°C I-grade (70°C C-grade or 125°C H-grade) or –40°C
I/H-grade (0
°C C-grade) before successive measurement.



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