Example of a quadruplex LCD driver with STM8

AN2687

12/22

Doc ID 14296 Rev 1

Figure 5.

Hardware connection diagram

3.1

First method: Timer 2

In this method, the LCD timing is generated by the Timer 2 edge alignment mode using 2

interrupts: a compare one (value loaded into the TIM2_CCR1 register) and an overflow one

(value loaded into the TIM2_ARR register).

Each LCD display cycle consists of 4 phases, one for each backplane. Each COM line

generates its waveform during the corresponding phase e.g. COM1 line during phase1,

COM2 line during phase 2, etc.

phase consists of two parts:

1.

active time

2.

dead time

During the active time, the segment lines and COM lines are used to drive the LCD. During

the dead time, the segment and COM lines are used to tune the contrast.

The active time starts after the Compare interrupt and, the dead time starts after the

Overflow interrupt. A total of 16 interrupts is generated in each frame period with 4 interrupts

per control period. There are 2 Compare events (CCR1_1 and CCR1_2 managed in the

470 k

Ω

470 k

Ω

Network resistors

Common lines

LCD Glass

Segment lines

PC4-PC7

ai14904

8

8

8

8

PB0-PB1

PD0-PD1

PE0-PE1

PG0-PG1

STM8

PE1

PE2

10 k

Ω