AN2595 - Application note

Port0 startup configuration

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2.2

Port0 startup configuration

Figure 3 illustrates the usage of PORT0 pins to configure ST10F27xZx. All pins are sampled

at power-on reset but some of them are not sampled for specific reset conditions. For

details, please refer to the product datasheet and application note.

Figure 3.

Port0 pin assignment for power-on configuration

Clock options

(Refer to datasheet /

Segment address lines

Chip Selects

WR configuration

Bustype (BTYP)

Startup configuration

Bootstrap loader modes

Reserved

Reserved

Adapt mode

Emulation mode

P0H7

P0H6

P0H5

P0H4

P0H3

P0H2

P0H1

P0H0

P0L7

P0L6

P0L5

P0L4

P0L3

P0L2

P0L1

P0L0

P0H

PORT0

P0L

External

P0L pin

Port0 during reset

Internal

user’s manual

for PLL factor)

pull-up

pull-down