AN2390 datasheet(19/42 Pages) STMICROELECTRONICS

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AN2390

Evaluation board implementation

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2.3.2

Use of the ST7 MCU on-chip peripherals

The time base is generated using the Main Clock Controller and the PWM is generated by

the 16-bit timer. In order to minimize supply current, the ST7 core puts itself into WAIT

mode between two state updates which is updated @50 ms for Li-ion and @5 s for NiMH

but the PWM duty cycle for both is updated @50 ms. The reason for keeping the state

update high for NiMH is to detect the end of charging conditions properly which requires

monitoring the voltage difference (Zero Delta Voltage Condition) for a long period of time,

keeping a low value might result in wrong detection. The selection of state update request

for NiMH depends on the user application.

In this demo, the same interrupt condition (Timer reaching zero) also increments the

timekeeper counters. This means the timekeeper is synchronized with the state updates.

The timekeeper divides the standard timer frequency. To do this, it has three counters: tick,

timeKeeper_Low and timeKeeper_Hi.

The analog to digital converter (ADC) is used intensively before each slot state update. In

most cases, the PWM output cannot be disabled, so due to switching noise, the ADC

accuracy is not optimal. To reduce errors, the ADC measures battery voltage, battery

current and battery temperature 16 times in a row and takes the average as the final value.

The software is able to remove any spurious errors due to noise to avoid any wrong

interpretations. The slot state monitoring software works with the mean values.

As explained earlier, battery voltage measurements must be corrected with battery current

measurements. These corrections require some computing, performed on the 16-bit words.

Table 4.

Charge timekeeper counters

tick

timeKeeper_Low

timeKeeper_hi

Increment Condition

Timer Zero IT

tick = 0

timeKeeper_Low = 0

Period

General

TTMZ

125 * TTMZ

60,000 * TTMZ

Evaluation

board

2 ms

250 ms

1 min

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