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LTC3801B bảng dữ liệu(PDF) 11 Page - Linear Technology

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Trang chủ  http://www.linear.com
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LTC3801B bảng dữ liệu(HTML) 11 Page - Linear Technology

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LTC3801/LTC3801B
sn3801 3801fs
APPLICATIO S I FOR ATIO
Foldback Current Limiting
As described in the Output Diode Selection, the worst-
case dissipation occurs with a short-circuited output
when the diode conducts the current limit value almost
continuously. To prevent excessive heating in the diode,
foldback current limiting can be added to reduce the
current in proportion to the severity of the fault.
Foldback current limiting is implemented by adding di-
odes DFB1 and DFB2 between the output and the ITH/RUN
pin as shown in Figure 5. In a hard short (VOUT = 0V), the
current will be reduced to approximately 50% of the
maximum output current.
Figure 5. Foldback Current Limiting
VFB
ITH/RUN
VOUT
LTC3801/
LTC3801B
R1
3801 F05
R2
DFB1
DFB2
+
PACKAGE DESCRIPTIO
S6 Package
6-Lead Plastic TSOT-23
(Reference LTC DWG # 05-08-1636)
1.50 – 1.75
(NOTE 4)
2.80 BSC
0.30 – 0.45
6 PLCS (NOTE 3)
DATUM ‘A’
0.09 – 0.20
(NOTE 3)
S6 TSOT-23 0302
2.90 BSC
(NOTE 4)
0.95 BSC
1.90 BSC
0.80 – 0.90
1.00 MAX
0.01 – 0.10
0.20 BSC
0.30 – 0.50 REF
PIN ONE ID
NOTE:
1. DIMENSIONS ARE IN MILLIMETERS
2. DRAWING NOT TO SCALE
3. DIMENSIONS ARE INCLUSIVE OF PLATING
3.85 MAX
0.62
MAX
0.95
REF
RECOMMENDED SOLDER PAD LAYOUT
PER IPC CALCULATOR
1.4 MIN
2.62 REF
1.22 REF
4. DIMENSIONS ARE EXCLUSIVE OF MOLD FLASH AND METAL BURR
5. MOLD FLASH SHALL NOT EXCEED 0.254mm
6. JEDEC PACKAGE REFERENCE IS MO-193
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no represen-
tation that the interconnection of its circuits as described herein will not infringe on existing patent rights.



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