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STARTING A PWM SIGNAL DIRECTLY AT HIGH LEVEL USING THE ST7 16-BIT TIMER

Fcpu= CPU frequency

presc= Timer 16 presc

Figure 2 shows the waveforms we see on an oscilloscope if the PWM signal is initialized at

10KHz with a 50% duty cycle (OLVL2=1 and OLVL1=0) and if a flag is set as soon as the

counter is started.

Figure 2. OCMP1 waveform with 50% Duty Cycle

We can see from this figure that we have to wait until the counter reaches the OC2R register

value to get the first high state on the OCMP1 pin. So we have lost one PWM cycle before get-

ting the first high level and in some applications, like energizing motor windings, this is not ac-

ceptable. After a motor demagnetization phase, if the windings are not energized immediately

when the PWM is started, the motor can stall. The purpose of the following sections is to ex-

plain how to get a high level on OCMP1 pin immediately.

To solve the problem, we have to handle two cases.

1. The PWM signal is high when the timer is between FFFC (its reset value) and the OC1R

register value. This means OLVL1=0 and OLVL2=1.

2. The PWM signal is high when the timer is between the OC1R register value and the OC2R

register value. This means OLVL1=1 and OLVL2=0.

Timer 16 start

output enabled

flag

PWM

OUTPUT