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công cụ tìm kiếm bảng dữ liệu linh kiện điện tử |
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công cụ tìm kiếm bảng dữ liệu linh kiện điện tử |
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UPD62AMC bảng dữ liệu(PDF) 29 Page - NEC |
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UPD62AMC bảng dữ liệu(HTML) 29 Page - NEC |
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29 / 62 page  29 µPD62A Data Sheet U14474EJ1V0DS00 8. SYSTEM CLOCK OSCILLATOR The system clock oscillator configuration consists of a ceramic resonator oscillation circuit (fX = 2.4 to 8 MHz). Figure 8-1. System Clock The system clock oscillator stops its oscillation when reset or in STOP mode. Caution When using the system clock oscillator, wire as follows in the area enclosed by the broken lines in the above figure to avoid an adverse effect from wiring capacitance. • Keep the wiring length as short as possible. • Do not cross the wiring with the other signal lines. Do not route the wire near a signal line through which a high fluctuating current flows. • Always make the ground point of the oscillator capacitor the same potential as the ground. Do not ground the capacitor to a ground pattern through which a high current flows. • Do not fetch signals from the oscillator. PD62A XOUT XIN GND Ceramic resonator µ |
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