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AN4345 bảng dữ liệu(PDF) 11 Page - STMicroelectronics |
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AN4345 bảng dữ liệu(HTML) 11 Page - STMicroelectronics |
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11 / 28 page ![]() DocID025078 Rev 1 11/28 AN4345 Board testing 28 4.2 Precision of the regulation and output voltage ripple The output voltage VOUT1 of the board has been measured according to different lines and load conditions, both when 5 V output (obtained through linear regulator) is open loaded and full loaded. Results are reported on Table 3. The output voltage is not affected by the line condition and by the IC biasing (external or self-biasing). Table 3. Output voltage line-load regulation - VOUT1 (IOUT2 = 0 mA) VOUT1 (IOUT2 = 0 mA) No load 25% load 50% load 75% load 100% load External biasing Self- biasing External biasing Self- biasing External biasing Self- biasing External biasing Self- biasing External biasing Self- biasing 90 12.74 12.61 12.14 12.04 12.09 12.02 12.07 11.99 12.05 11.98 115 12.73 12.61 12.14 12.04 12.08 12.01 12.06 11.99 12.04 11.97 150 12.76 12.65 12.14 12.04 12.08 12.01 12.06 11.98 12.04 11.97 180 12.79 12.68 12.15 12.05 12.08 12.00 12.06 11.98 12.04 11.97 230 12.86 12.76 12.16 12.06 12.08 12.00 12.05 11.98 12.04 11.97 265 12.87 12.78 12.17 12.08 12.08 12.00 12.05 11.98 12.04 11.97 Table 4. Output voltage line-load regulation - VOUT1 (IOUT2 = 50 mA) VOUT1 (IOUT2 = 50 mA) No load 25% load 50% load 75% load 100% load External biasing Self- biasing External biasing Self- biasing External biasing Self- biasing External biasing Self- biasing External biasing Self- biasing 90 12.01 12.11 12.06 11.98 11.97 12.06 11.97 12.03 11.96 12.01 115 12.00 12.09 12.05 11.98 11.97 12.04 11.96 12.02 11.94 12.00 150 12.00 12.08 12.04 11.97 11.97 12.03 11.95 12.02 11.93 12.00 180 12.00 12.08 12.04 11.97 11.96 12.03 11.95 12.01 11.93 12.00 230 12.00 12.08 12.04 11.98 11.96 12.03 11.95 12.01 11.93 12.00 265 12.00 12.08 12.04 11.98 11.96 12.03 11.95 12.01 11.93 12.00 |
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