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UPD3739D bảng dữ liệu(PDF) 2 Page - NEC |
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UPD3739D bảng dữ liệu(HTML) 2 Page - NEC |
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2 / 24 page ![]() µPD3739 2 COMPARISON CHART Item µPD3739 µPD35H71A PIN CONFIGURATION Pin 1 GND DGND Pin 2 NC TEST Pin 4 NC VDD Pin 11 NC VSUB Pin 21 NC AGND Pin 22 NC DGND RECOMMENDED Capacitance of reset gate clock 1000 ± 20 % Unspecified OPERATING CONDITIONS pin external capacitor (pF) Data rate MIN. (MHz) 0.5 Unspecified ELECTRICAL Saturation exposure TYP. (Ix ⋅s) 0.17 0.29 CHARACTERISTICS Photo response TYP. 4 ±5 non-uniformity (%) MAX. 10 ±10 Average dark signal TYP. (mV) 0.3 1.0 Dark signal MIN. 0 –3 non-uniformity (mV) TYP. 4 –1, +3 MAX. 6 +6 Power consumption MAX. (mW) 400 Unspecified Response (V/Ix ⋅s) MIN. 7.2 4.15 TYP. 9.0 5.2 MAX. 10.8 6.25 Offset level TYP. (V) 3.5 3.0 Shift register clock pin MIN. 250 400 capacitance (pF) Note TYP. 350 500 MAX. 500 800 Dynamic range TYP. DR1 375 500 (times) DR2 2143 Undefined Reset feed-through MIN. 0 Unspecified noise (mV) TYP. 400 250 MAX. 600 500 Random noise TYP. (mV) 0.7 Undefined TIMING CHART In phase outputs operating Out of phase outputs timing is added operation only DEFINITIONS OF Photo response non-uniformity Absolute value Minus and plus value CHARACTERISTICS ITEMS Dark signal non-uniformity Absolute value Minus and plus value Random noise Standard deviation of signal Undefined level distribution by scan RECOMMENDED SOLDERING CONDITIONS Wave soldering is deleted — Note Due to the changing of measurement conditions, and pin capacitance of each devices is almost the same. ( µPD3739: Power supply = 12 V, µPD35H71A: Power supply = 0 V) |
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