Layout suggestions

AN4241

16/18

Doc ID 024193 Rev 1

6

Layout suggestions

The devices of the dSPIN™ family integrate a power stage which can dissipate a significant

amount of power compared to the die dimension. For this reason, the devices are proposed

in packages with high thermal performance and exposed pads in order to ease the heat

dissipation.

In this situation, the layout of the board is a significant part of the thermal design of the

application.

The exposed pad of the device must be directly connected to the ground layer of the board,

which acts as a heat sink. For the same reason, the size of the ground layer must be as

wider as possible and, if more layers are present, the top and bottom ones should be

preferred. In multi-layer designs the exposed pad must be connected to all the ground layers

using multiple vias equally spaced.