Operating modes

AN2989

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Doc ID 15761 Rev 1

3.3

Low-power mode

bits of CTRL_REG1.

Turn-on time follows the same rules as for power-down mode (Table 11).

3.4

Sleep to wake

The sleep to wake function, in conjunction with low-power mode, allows further reduction of

system power consumption and development of new smart applications.

The LIS331DLM may be set to a low-power operating mode, characterized by lower date

rate refreshments. In this way the device, even if sleeping, continues sensing acceleration

and generating interrupt requests.

When the sleep to wake function is activated, the LIS331DLM is able to automatically wake

up as soon as the interrupt event has been detected, increasing the output data rate and

bandwidth. With this feature the system may be efficiently switched from low-power mode to

full-performance depending on user-selectable positioning and acceleration events, thus

ensuring power saving and flexibility.

The sleep to wake function is activated through the TurnOnx bits of CTRL_REG5 (Table 8).

When the device is in sleep to wake mode, it automatically samples the acceleration data at

device goes back to generating data at ODR (Figure 4). If interrupt conditions are not

The device is ready to immediately generate valid samples as soon as it exits from sleep to

wake mode.

Note:

At an interrupt event, the contents of CTR_REG5 changes to 0x01 while the content of

CTRL_REG1 is left untouched: PMx bits are ignored. To return to normal mode or low-

power-mode, the TurnOnx bits of CTRL_REG5 must be set to zero.

Figure 4.

Sleep to wake mode