AN2950 datasheet(21/37 Pages) STMICROELECTRONICS

21 / 37 page

AN2950

Testing the board

Doc ID 15494 Rev 1

21/37

As the voltage on the feedback pin reaches the VFBolp threshold (4.8 V typical), the VIPer28

stops switching (see Figure 27) and is not allowed to switch again until the VDD voltage has

fallen below VDD(RESTART) (4.5 V typical) and risen again up to VDDon (14 V typical, see

Figure 26 and Figure 30).

If the short-circuit is not removed, the protection is tripped again and the system works in

auto-restart mode (see Figure 26, 28 and 30).

If the overload disappears, the converter resumes working normally at the first VDD

recycling, as shown in Figure 30 and 31.

C7 is needed because usually the value of the C6 capacitor, coming from the loop stability

calculations, is too small to ensure an OLP delay time long enough to bypass the initial

output voltage transient at start-up. The value of C7 can be sufficiently high to provide the

needed delay, and the value of R12 chosen so that the R12-C7 pole does not affect the

stability of the loop.

During an overload the converter is operated at a very low duty cycle, being the MOSFET

kept in the off state for most of the time. This results in a very low average power throughput,

which is safe for the power elements in this condition.

Figure 26.

OLP: output short and protection

tripping

Figure 27.

OLP: output short and protection

tripping (zoom on FB pin voltage)

Figure 28.

OLP: steady state (autorestart

mode)

Figure 29.

OLP: steady state (zoom on FB pin

voltage)

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