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AN2864 bảng dữ liệu(PDF) 12 Page - STMicroelectronics |
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AN2864 bảng dữ liệu(HTML) 12 Page - STMicroelectronics |
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12 / 29 page ![]() Testing the board AN2864 12/29 Doc ID 15282 Rev 1 3.2 Precision of the regulation and output voltage ripple The output voltage of the board is measured in different line and load conditions. Results are reported in Table 4. The output voltage variation range is a few mV for all the tested conditions. The VDD voltage is also measured to verify that it is within the operating range of the device. The ripple at the switching frequency superimposed on the output voltage is also measured. The high frequency voltage ripple across capacitor C9 (VOUT_FLY), which is the output capacitor of the flyback converter before the LC filter, is also measured to verify the effectiveness of the LC filter. The results are reported in Table 5. The waveforms of the two voltages (VOUT and VOUT_FLY) are reported in the figures below. Table 4. Output voltage and VDD line-load regulation VINAC (V) No load Half load Full load VOUT (V) VDD (v) VOUT (V) VDD (V) VOUT (V) VDD (V) 90 5.05 10.7 5.04 23.5 5.04 25.4 115 5.06 10.6 5.04 24.1 5.04 25.4 230 5.06 10.6 5.04 25.3 5.04 25.4 265 5.06 10.4 5.04 25.2 5.04 25.4 Table 5. High frequency output voltage ripple VINAC (VRMS) No load Half load Full load VOUT (mV) VOUT_FLY (mV) VOUT (mV) VOUT_FLY (mV) VOUT (mV) VOUT_FLY (mV) 90 11.1 94.1 26.0 192 41.5 261 115 10.9 90.9 26.1 192 39.7 269 230 12.8 102 26.5 201 40 274 265 14.7 110 26.7 194 39.4 270 |
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