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AN2507 bảng dữ liệu(PDF) 29 Page - STMicroelectronics |
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AN2507 bảng dữ liệu(HTML) 29 Page - STMicroelectronics |
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29 / 31 page ![]() AN2507 Examples of register setup for each mode 29/31 ● Packet 2 Sets FLASH mode with 1.5 s duration. Dimming is not set again as it is same as before. ● Packet 3 Sets FLASH mode with 1.5 s duration. Dimming remains untouched. ● Packet 4 Sets FLASH mode with 1 s duration. Dimming remains untouched. Please refer to Figure 22 for more details about the I2C-bus packets timing. The solution described above is using a software termination of the FLASH pulse. (It is timed out by the internal timer.) The FLASH pulse could be also terminated by setting the TRIG pin to low after 4 seconds. In this case, the fourth packet could be the same as packets Packet 2 and Packet 3, because the timing of the FLASH is done by the TRIG pin and it is not necessary to change the value of FTIM in the COMMAND REGISTER. This way of periodical reloading of the COMMAND REGISTER can be used to achieve a continuous FLASH light. In this case, it is very strongly recommended to guarantee an efficient cooling of both the LED and the chip, otherwise the light can be interrupted by activation of the thermal protections. Table 28. 1st I2C data packet to restart the FLASH mode Byte Hex Binary Comment 1 62 0 1 1 0 0 0 1 0 Device address + R/W bit 2 00 0 0 0 0 0 0 0 0 Command register address 3 DF 1 1 0 1 1 1 1 1 Data of the command register Table 29. 2nd I2C data packet for restart of the FLASH mode Byte Hex Binary Comment 1 62 0 1 1 0 0 0 1 0 Device address + R/W bit 2 00 0 0 0 0 0 0 0 0 Command register address 3 DF 1 1 0 1 1 1 1 1 Data of the command register Table 30. 3rd I2C data packet to restart the FLASH mode Byte Hex Binary Comment 1 62 0 1 1 0 0 0 1 0 Device address + R/W bit 2 00 0 0 0 0 0 0 0 0 Command register address 3 DA 1 1 0 1 1 0 1 0 Data of the command register |
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