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AN3275
ST8024L application hardware guidelines
Doc ID 17962 Rev 1
23/32
4.2
Clock section optimization
Recommendations for the PCB design clock area include:
●
The XTAL should be connected as closely as possible to the XTAL pins to reduce signal
reflections, especially for high frequency applications (see Figure 19).
●
Two compensation capacitors (C9 and C10), each 15 pF (typ) can improve the
oscillator startup performance. Even without these additional capacitors the CLK duty
cycle is guaranteed between 45% and 55% (according to the NDS specifications), with
frequencies up to 26 MHz.
Figure 19.
ST8024L application PCB crystal (XTAL) connection



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